Peregrine’s Novel Power Limiter Architecture

In the September issue of Microwave Product Digest, Peregrine engineers Peter Bacon and Jack Lu describe Peregrine’s novel power limiter architecture for radar applications. Radar equipment has specialized RF needs that are shared between the two major device types: single-element and phased-array. Power limiters help make the high power signal transmission and sensitive receive functions coexist in radar applications. With Peregrine’s new all-in-one architecture, RF engineers can significantly reduce time-to-market and cost. Peregrine’s chip is eight times smaller than the board space required by PIN-diode solutions, and the power limiter provides a 10–100X improvement in response-and-recovery time, delivers greater than 40 dB improvement in linearity (IP3) and offers a 20X improvement in ESD (electrostatic discharge) protection.

To read the complete article in Microwave Product Digest, click here.